Build: The Switched Output

Purpose

To finish the one path from a microcontroller pin to a lamp, and to prove three things about it that a working panel cannot tell you: how long after the command the light actually arrives, whether the lamp is truly dark between exposures, and whether the UVA unit’s lid interlock still wins when the timer is calling for an exposure.

Where the switching element lives is already decided, and it is not in this box. Part XVI put a logic-level transistor, a constant-current driver and a fuse inside the LED head and inside the UVA unit, and says of the second in one sentence that the timed channel drives its gate. So the timer’s output is a gate-drive line at extra-low voltage carrying microamps, and the lamp’s current never enters this enclosure. Stage 1 sets out why that is better than the alternative rather than a concession to it.

There is one channel to build. Until 5 September 2026 there were two, and the second one — an isolated dry contact whose only job was to close the trigger of a bought, certified, sealed mains appliance switch — was removed rather than deferred when the market survey that the isolation lesson reports found no acceptable product to close. This page states that result, fits the connector the surviving channel needs, and leaves a labelled blank where the other one would have gone.

Learning objectives

By the end of this build you should be able to:

• finish a low-side MOSFET channel across two enclosures, and say which of its passive components belongs at the pin, which belongs at the gate, and what would go wrong if either were moved to the other end;
• size the transistor from its datasheet for your own array current, compute its dissipation and its junction rise, and say why running it at a twenty-fifth of its rating is the cheapest reliability available;
• state where a fuse goes in a low-voltage channel and what it protects, which is not what most people say it is;
• compute the upper bound on off-state leakage from the datasheet, and then test it on paper anyway, and say why the second step is not redundant;
• apply the survey’s five criteria as an acceptance test to any switching product you are offered, and reject one in under a minute;
• name the three routes a legacy mains enlarger has, say what each costs, and explain why there is no fourth.

Prerequisites

Part XIV’s electronics primer, which owns the low-side switch, the gate resistor, the gate pull-down and the datasheet discipline. Every one of those is used here and none is re-derived.

The isolation lesson, which owns the voltage bands, what isolation is, the four switching devices and the survey. This page is its build consequence.

The timer firmware, running, with its selftest() and test() passing, because the delay measurement below drives the real output pin under the real state machine.

Part XVI’s LED enlarger head and UVA unit, both commissioned, because this channel is defined by what it switches and by nothing else.

Safety classification

Level B, and the criterion is the rubric’s own: low-voltage electronics builds where a certified power supply provides isolation from the mains, and high-brightness LED sources. Both apply. The UVA array applies a second time, and its controls are Part XVI’s, unchanged: the enclosure, the two interlock switches, the indicator on the array side, and no exposure of eyes or skin to an energised array at any point.

What is not a hazard here, and why. There is no mains conductor in this circuit at any point, and the survey is the reason there never will be: nothing on this page opens, extends, rewires or drills a mains enclosure, and no procedure for doing any of that appears anywhere in this course. Everything downstream of the certified supply is at 5, 12 or 24 V, inside the extra-low-voltage band HSE describe, and HSE’s first control is the one the whole design follows — limit the supply voltage to the lowest that will do the job, because 230 V AC kills and the risk is greatest in wet surroundings. Nor is there a chemical hazard in the wiring stages: a transistor, a fuse holder and a connector are inert solids and none of them produces a vapour, so ventilation is not among the controls for those stages. It returns as a control for soldering and for the print sequence at the end.

One step is declared higher than the session’s baseline, under the course’s mixed-level rule. Test T4 asks you to defeat nothing and prove everything, but it does require the UVA array to be commanded on while the lid is closed and then opened under command. For that step only: UVA-blocking eyewear worn, skin covered, nobody else in the room, the box on the bench and not held, and the test abandoned the moment anything behaves unexpectedly rather than repeated to see whether it does it again. The step is still Level B; what is raised is the attention, and the controls are stated here so you meet them before the procedure rather than inside it.

Hazards

Ultraviolet A to the eye and the skin, during the interlock test, which is the one test on this page that deliberately energises the array. ICNIRP’s engineering control for a source a person can get at is an interlock, and the point of T4 is to prove yours works — which means the array is live at the moment the lid moves. Eyewear and covered skin are the backup for the two seconds in which the interlock is being asked to do its job, not a substitute for it.

Heat. The transistor dissipates while it conducts, and the UVA array dissipates far more: Nichia give the NVSU233B a junction limit of 130 °C, and Part XVI’s thermal design is what keeps it there. The heatsink, the plate and the enclosure are hot to the touch after a full-length exposure and the hands-off rule from that page applies unchanged.

Soldering. Burns and rosin flux fume, with Part XIV’s controls, unmodified.

A cable on a dark floor, in a room that already has a foot switch in it. Every cable is routed under the bench, taped at two points, and long enough to reach without being long enough to loop. The supply, the timer and the connectors live on the dry side, above bench level, with the cables dressed so a drip runs away from a connector rather than into it.

Print chemistry, for the leakage test at T3, at Level A in the concentrations the developer and the fixer are supplied at.

Required PPE

UVA-blocking eyewear and covered skin for T4 and for any moment the array can be energised with the lid off, which should be none. Eye protection whenever leads are cut and whenever solutions are handled. Nitrile gloves for the three baths of the leakage test; they are not worn for soldering, where the hazard is heat rather than splash and a glove is a way of not noticing a burn.

Ventilation is a control for two stages and not for the others: extraction at the iron under Part XIV’s rules, and ordinary print-sequence ventilation for T3. It is not among the controls for wiring, fusing or connector work, because nothing in those stages produces a vapour.

Parts

In the timer’s enclosure, on the small board that finishes GP15:

Part	Quantity	What it does	Alternatives and notes
Resistor, 330 Ω	1	Gate series resistor, at the pin	Bounds the pin current into the gate’s 1700 pF. It belongs beside the pin because it is the pin it protects
Resistor, 100 kΩ	1	Line pull-down, at the timer end	Defines the output line while the Pico resets and while nothing is plugged in
Connector, 2-pin polarised, keyed	1 pair	Gate signal and common negative, out to the load	A different family from the 6.35 mm foot-switch jack, and at the other end of the enclosure
Blanking plate and a label	1	Where the second channel would have gone	Dry contact, not fitted, 5 September 2026, written inside the lid
Indicator LED, red, and its resistor	0 or 1	Says the channel is asserted	Read stage 5 before fitting one: an untested emitter beside unexposed paper is a fog source

In each load’s enclosure, which Part XVI’s build pages already specify and which this page sizes and tests:

Part	Quantity	What it does	Alternatives and notes
Logic-level N-channel MOSFET, TO-220	1 per switched channel	The switch, beside the thing it switches	The IRLZ44N is the course’s reference part from Part XIV, so the gate arithmetic is shared. Read stage 0 before you assume it fits your array
Resistor, 100 kΩ	1 per transistor	Gate pull-down, at the gate	Holds the gate low when the cable is unplugged, broken, or plugged into the wrong thing. This is the component the safety argument rests on
Fuse holder and fuse, low voltage	1 per load	Protects the cable	Rating chosen from your own conductor and load, by the rule in stage 2. In the positive rail, at the supply end
Heatsink for TO-220, small	0 or 1	Only if the arithmetic says so	Fit it after you have computed the dissipation, not before

Common to both, plus the rig:

Part	Quantity	What it does	Alternatives and notes
Hook-up wire, stranded, with ferrules	as needed	The gate line and the load’s own wiring	Ferrules on every stranded end that enters a screw terminal
Heat-shrink sleeving, cable ties, grommets	—	Strain relief and insulation	Every wire that leaves a board is anchored
Master switch, in each load’s supply line	1 per load	Removes power from the load, whatever the timer is doing	Within reach in the dark. Do not tidy it behind the bench

The transistor is chosen for your array, not for this page. The IRLZ44N’s front page gives 55 V drain-to-source, 47 A of continuous drain current at a 25 °C case, ±16 V gate-to-source and a junction range of −55 to +175 °C — enormous margins against a 24 V array drawing a couple of amperes, which is the point. Stage 0 does the arithmetic and names the one figure the datasheet does not print.

Tools

Temperature-controlled soldering iron and stand, side cutters, wire strippers, a ferrule crimp tool, a multimeter, an infrared thermometer or thermocouple, a small drill and a step drill for the panel hole, and the second Pico running timer_probe.py from the firmware page. The photodiode head from Part XV is wanted for T1 and is the only new tool on this list.

Estimated cost

Cost band ££, and almost all of it is in parts you already own: the transistor, the resistors, the fuse and the connector together are a few pounds. What lifts the band is the second Pico for the probe, and that is shared with the firmware page rather than bought again.

No price is quoted for any of it, because the planner carries no electronics line at all — the parts for Parts XIV to XVII are among the gaps it names, and a figure invented here would be a guess dressed as a quotation. What outlives a quotation is the specification: a logic-level MOSFET whose datasheet quotes an on-resistance at the gate voltage you will actually apply, a fuse chosen from your own conductor, and a connector that cannot mate with a jack plug.

The one dated figure on this page is the alternative it removes, and the Alternative route section carries it.

Estimated consumables cost

Nothing in the wiring is consumed; the transistor, the fuse holder, the connector and the master switch are all capital and go into an instrument meant to be recalibrated rather than replaced. What one run of this page uses up is the paper and chemistry of the two tests that need them.

Consumed	This session	Sourced price	Cost this session
Photographic paper, variable-contrast RC, 5 × 7 in	2 sheets — one under the dark lamp, one control	£16.06 per 25 or £44.71 per 100, dated 5 September 2026, so £0.45–£0.64 a sheet	£0.90–£1.28
Paper developer, working strength	500 mL of 1+9, that is 50 mL of concentrate	£10.52 per 500 mL or £20.03 per 1 L, so £0.020–£0.021 a millilitre	£1.00–£1.05
Stop bath, working strength	500 mL of 1+19, that is 25 mL of concentrate	£10.66–£12.18 per 500 mL	£0.53–£0.61
Fixer, working strength	500 mL of 1+4, that is 100 mL of concentrate	£21.05–£25.98 per 1 L	£2.11–£2.60
Pre-coated cyanotype paper, 8 × 10 in	2 sheets for the interlock test	£18.95 for 20 or £36.95 for 50, so £0.74–£0.95 a sheet	£1.48–£1.90
Fuse, if one is blown during testing	0 or 1	None. The planner carries no electronics line	—
Lead-free solder, heat-shrink, ferrules, hook-up wire	a few grams and about a metre	None. The planner carries no electronics line	—
Wash water	a few litres	Not priced by the planner	—

The priced rows give £6.02 to £7.44 for one run of this page’s tests. That is a floor and not a total: three rows carry no dated price, nothing on them is free, and the bath figures assume the smallest useful volume is mixed and discarded after the session, which a controlled test requires.

Equipment is deliberately out of the table. The transistor, the meter, the probe board, the photodiode head and the dishes are not consumed by a session, and a page that counted them would stop measuring what the consumables calculator needs.

Build

Six stages and three hours. The first is arithmetic, the third fits a blanking plate on purpose, and the soldering is split across two enclosures — a few components in the timer, and the switching half in whichever load you are wiring up today.

Stage 0 — Size the transistor before you buy it (25 minutes)

The switch dissipates while it conducts, and the whole of that dissipation is one equation.

P = I² × R_DS(on)

Conduction loss in a saturated MOSFET

I is the current through the channel in amperes, R_DS(on) the on-resistance at the gate voltage you are actually applying, and P the heat in watts. Junction temperature then follows from the thermal resistance:

ΔT = P × R_θJA

Junction rise above ambient

The IRLZ44N’s junction-to-ambient figure is 62 °C/W with no heatsink, its junction-to-case is 1.4 °C/W, and its junction limit is 175 °C.

🧮Worked, for a twelve-emitter UVA array, and then for the LED head

Part XVI’s UVA array is nine to sixteen Nichia NVSU233B emitters at 3.85 V and 1000 mA on a certified 24 V supply, which puts six in series per string. Take two strings of six at 1.00 A each, so 2.00 A through the switch.

The on-resistance is where the honesty is needed, because the Pico drives the gate at 3.3 V and the datasheet does not quote a figure there. Compute the answer three times and see whether it matters.

On-resistance used	Where it comes from	P at 2.00 A	Junction rise at 62 °C/W	Junction at 20 °C ambient
0.025 Ω	The datasheet’s 5.0 V figure	0.100 W	6.2 °C	26 °C
0.035 Ω	The datasheet’s 4.0 V figure, the worst quoted	0.140 W	8.7 °C	29 °C
0.100 Ω	Part XIV’s deliberately pessimistic stand-in for the unquoted 3.3 V	0.400 W	24.8 °C	45 °C

Every one of them is 130 °C below the junction limit, so no heatsink is needed and the gap in the datasheet costs nothing. That is the useful form of the answer: not “it is fine” but “the uncertainty is four times and the margin is a factor of forty, so the uncertainty cannot reach the conclusion”.

Now do it again for a case where it would. At 10 A the same three figures give 2.5 W, 3.5 W and 10 W, and the last of those is a junction 620 °C above ambient with no heatsink — which is a part that has failed rather than a part that is warm. Nothing in this course draws 10 A. The point of computing it is that you can see where the argument stops working, and therefore know when to go and find a transistor whose datasheet quotes a figure at 3.3 V.

The single white emitter of Part XVI’s LED head is easier: 700 mA gives 0.049 W at the pessimistic 0.1 Ω, a junction rise of 3 °C, and a switch that is at room temperature all evening.

!A threshold is not a usable-on voltage, and this is where it bites

Nexperia’s application note is blunt that VGS(th) is measured with gate and drain shorted at a few hundred microamps, that it depends on chip size, and that it is not how the device is used. The IRLZ44N’s 1.0 to 2.0 V threshold therefore says the part has begun to leak a quarter of a milliamp; it says nothing about whether it is on.

The number that answers that is the on-resistance at your gate voltage. When you substitute a different transistor — and you should, if your array draws more than a few amperes — the acceptance test is one line: does its datasheet print an on-resistance at 3.3 V? If it does, the arithmetic above is exact rather than bracketed. If it does not, you are estimating, and you must say so in the build log.

Stage 1 — One line across two boxes, and which resistor goes where (30 minutes)

The one channel, from the pin to the lamp, across two enclosures

1. 1Certified enclosed supply, never opened — the only thing in the room at mains potential, and it is a bought appliance
2. 2GP15, then the 330 Ω series resistor — it protects the pin, so it belongs beside the pin
3. 3Line pull-down, 100 kΩ, in the timer — defines the output line during a reset and with nothing plugged in
4. 4Two-pin polarised connector: gate signal and negative — microamps. The lamp current is never on this cable
5. 5Gate pull-down, 100 kΩ, at the gate — holds the lamp off when the cable is unplugged or broken
6. 6Master switch, then fuse, in the load's positive rail — the fuse protects everything downstream of it, so it goes at the supply end
7. 7Driver, load, and the lid interlock in series — the interlock is in the current path, so it beats the transistor

One signal wire and one negative cross the connector. Every ampere in the drawing stays inside the load's box, which is the property that makes the connector, the cable and the timer's enclosure incapable of carrying a fault current.

Two enclosures, one line, and the split is deliberate. Part XVI put the transistor, the driver and the fuse inside each load, and this page keeps them there rather than dragging the lamp current back into the timer. Three things follow from that, and all three are worth having.

The connector and its cable carry microamps rather than amperes, so neither can carry a fault current, neither warms, and neither has to be sized. A short across the timer’s output connector shorts a gate line to ground, which turns the lamp off.

Each load gets a transistor sized for itself. One switch in the timer would have to be sized for the largest thing anybody might ever plug in, and would then be enormously over-rated for a safelight and marginal for an array somebody built bigger than this course describes.

And the interlock and the thermal cut-out stay in the load’s own current path, where Part XVI put them and where they can act without the timer’s cooperation.

The series resistor, 330 Ω, belongs at the pin. The gate is a 1700 pF capacitor and a capacitor straight onto a pin is a momentary short. Through 330 Ω the peak pin current is 3.3 ÷ 330 = 10 mA and the gate charges with a time constant of 0.56 µs. Part XIV computed both. What this page adds is the placement: the resistor exists to protect the microcontroller’s pad, so it goes beside the pad, and a resistor fitted at the far end of a two-metre cable protects nothing during the moment the cable is shorted.

There are two pull-downs, and they answer two different questions. This is the part most builds get half right.

The gate pull-down, 100 kΩ from gate to source, sits in the load, at the transistor. It answers what holds the lamp off when nothing is driving the gate? — during a reset, during reprogramming, with the Pico unplugged while the load’s supply is live, and, the case a pull-down in the timer cannot cover, with the cable unplugged or broken. An undriven gate floats and a floating gate can switch a lamp on inside a closed box.

The line pull-down, 100 kΩ at the timer end, answers what is the output line doing when nothing is plugged into it? Without it a bare connector on the panel is an aerial, and with it you have something to meter: 100 kΩ from the output pin to ground with nothing connected is a one-second check that the board is right.

Fit both. They cost pence and change nothing electrically — two 100 kΩ in parallel are 50 kΩ, which against the 330 Ω series resistor is a gate at 3.28 V rather than 3.30 V.

!Where this timer has one output and Part XVI's head expects more

Part XVI’s LED head brings out a four-way connector — two gate signals, a common negative and a spare — because that head has a printing channel, a second channel wired and blanked for Part XVIII, and a focus mode with its own low-current driver and its own switch. This timer has one output.

So a decision has to be made and written on the head. The timer’s line drives the printing channel, which is the one an exposure is made through and the only one an interval means anything for; the head’s focus channel keeps its own switch and is worked by hand, which is what focusing wants anyway. The firmware’s focus mode then asserts the printing channel at printing current — useful for composing, and not what Part XVI’s focus mode is for, so record which is which and stop the lens down first.

Stage 2 — The fuse, and what it actually protects (20 minutes)

The fuse is in the load’s box, not in the timer’s, because that is where the current is. Part XVI states the rule for both builds — the fuse goes on the low-voltage side, sized to the array rather than to the supply — and this stage is how you choose it, which neither page had room for.

A fuse does not protect a lamp and it does not protect a transistor; both of those fail far faster than a fuse can open. A fuse protects the cable, which is why Electrical Safety First’s guidance on the mains side describes a blown fuse as the thing that stops the cable and the appliance overheating, and why a plug fuse is chosen from the appliance rather than from the socket. The same reasoning transfers to 24 V unchanged, because a conductor’s failure mode does not care what voltage is pushing the current through it.

Three consequences follow, and they are the whole of the specification.

It goes at the supply end of the positive rail, before the driver and before anything else, because what it protects is everything downstream of itself. A fuse fitted at the load end protects the last half-metre of a two-metre run.

Its rating comes from your conductor and your load, in that order. It must open before the smallest conductor in the circuit overheats, and it must not open on the array’s steady current. So you need two numbers: the current the array actually draws, measured at the fuse with a meter rather than computed from a specification, and the current your particular wire is rated to carry continuously, from the supplier who sold it to you.

This course cannot give you the second number. No conductor current-carrying-capacity table exists in this course’s corpus, and one invented here would be exactly the kind of confident error Rule 1 forbids. What the course can give you is the rule and the arithmetic, and the arithmetic is short: at 2.00 A through a run whose measured end-to-end resistance is R, the drop is 2.00 × R volts and the heat in the cable is 2.00² × R watts. Measure R with a meter across the made-up loom before you fit it. A drop of more than a few per cent of the supply voltage is a cable that is too thin for the job, whatever a table would have said.

✕The fuse that protects nothing

The commonest error in a low-voltage build is fitting a fuse rated at the supply’s capability rather than at the cable’s. A 24 V, 5 A supply feeding a 2 A array through thin hook-up wire, fused at 5 A because that is what the supply says on it, will happily deliver 4.9 A into a short in the wiring loom — indefinitely, with the fuse intact and the cable warming. Rate the fuse for the cable it is in front of, and be glad when it opens.

Stage 3 — The connector, and the one that is not fitted (25 minutes)

Two connectors, two shapes, two ends of the box. The foot switch is a 6.35 mm jack; the output is a 2-pin polarised connector of a different family entirely, keyed so that it can only mate one way. Not different colours — different shapes, because the room this instrument lives in has no light in it and colour does not exist there. The consequence of getting it wrong is not cosmetic: the foot-switch line is an input with a pull-up on it, and the output line is a driven gate signal, so plugging one into the other ties an input to an output and gives the firmware a pedal it cannot stop pressing.

And then the blank. Fit a labelled blanking plate where the second channel would have gone, and write inside the lid what it is a blank for. Two years from now somebody — you — will open this box and wonder whether a channel was omitted or fell out, and the label answers it: dry contact, not fitted, 5 September 2026.

!What the second channel would have needed, and why it is a blank rather than a socket

The removed output was a dry contact: a pair of terminals, isolated from everything in the timer, that close while the timer wants light and open when it does not. Three properties would have made it usable, and the third is the one nothing on the market had.

A defined open state at power-up and at reset. The same problem the gate pull-down solves, one level up: a relay or an opto-isolated output must be open while the board boots, resets or is reprogrammed, or the enlarger comes on by itself.

A genuine isolating component, whose isolation is a figure the maker publishes rather than an inference from a photograph. The isolation lesson is emphatic that a barrier is a property of two circuits and that an optocoupler on a relay board protects a microcontroller and not a person.

A trigger input at the far end that holds the mains output on for as long as it is asserted. This is the criterion the survey called number five, and it is the one every sealed appliance failed. RH Designs describe their own foot switch as one that exactly replicates the operation of the Start/Stop key; Kaiser’s 4030 sheet lists 500 W of switching, 0.1 to 99 seconds and a focusing light switch, and no external trigger of any kind. An input that starts a programme the other device times is not a trigger the Pure Silver timer can use, because the exposure would then be the other instrument’s and this one would be a button.

So the contact has nothing to close, and a socket with nothing to plug into it is worse than a blank: it invites somebody to improvise.

Stage 4 — Cable practice, and the master switch (30 minutes)

Ferrules on every stranded end that enters a screw terminal. A stranded conductor tightened under a screw spreads, loses contact area over months, warms, and eventually fails intermittently — a fault that looks exactly like a firmware bug and is not one. A ferrule turns a stranded end into a solid one.

Strain relief at every point a wire leaves something. A cable tie or a hot-melt anchor inside the box, a grommet through the panel, and enough slack that a pull on the outside is taken by the anchor rather than by the joint.

Routing. Off the floor, along the underside of the bench, taped at two points, away from the wet side of the room, and dressed so the last few centimetres into a connector run downwards away from it, so a drip runs off rather than in.

A master switch in each load’s supply line, within reach, in the dark, without looking. It is the third control in the layered argument the firmware page sets out: the pull-down covers reset, the interlock covers the lid, and the master switch covers everything neither thought of — including a fault in the transistor itself. A MOSFET fails short far more often than open, and a short one means a lamp that stays on until something upstream removes the current. That something is this switch.

Stage 5 — The indicator, and why this page will not name a part for it (20 minutes)

The channel wants an indicator, because a printer needs to know whether the output is asserted without looking at the load — and on the UVA route the load is inside a closed box.

There are three honest answers and they are ranked.

Best: the load is the indicator. An LED enlarger head is visible from the working position and tells you the truth about itself — not what the firmware intended but what the transistor did. Nothing beats it and nothing needs fitting.

Where the load is not visible, Part XVI has already fitted one, on the outside of the UVA box, on the array side of the interlock so that it goes out when the interlock opens. An indicator wired to the supply lies; and duplicating this one on the timer’s panel adds a second emitter to a room whose total emission has already been fog-tested as a set.

If you fit one on the timer anyway, three rules. It goes on the load side of the fuse and the transistor, so that it reports the current rather than the intention. It is red, hooded and dim, and its brightness is under firmware control so that it can be tested at the setting you will use. And it goes through Part XVI’s fog test exactly as the display did, with the safelight running as well — Kodak’s guide names lighted dials on equipment controls among the sources of fog and states that virtually all exposures are cumulative, so an emitter that passes alone can still push a room that was near its limit over it.

This course has fog-tested no indicator against paper, and therefore names no part and no current as acceptable. What it gives is the design that makes a pass plausible and the test that decides it. If your indicator fails the test at the lowest brightness you can see, the finding is that this instrument does not get an indicator, and that is a result rather than a failure.

Testing and calibration

Four tests, in this order. T1 and T2 are bench work in the light; T3 needs a dark room; T4 needs the UVA unit and the raised controls named in the safety section.

T1 — Command to light, measured at the easel

What you are measuring is the interval between the firmware asserting GP15 and the light actually arriving at the paper. It has three parts, and only the middle one belongs to this page.

Where the delay between the command and the light is spent

1. 1Firmware to pinthe state machine asserts GP15. The firmware page owns this and measures it with the probe.
2. 2Pin to gate to channelthe gate charges through 330 Ω into 1700 pF: a time constant of 0.56 µs. The datasheet's own switching times at a 3.4 Ω gate resistor are 11 ns of turn-on delay and 84 ns of rise, so the resistor dominates and the transistor is not the limit.
3. 3Driver and lampthe constant-current driver's own response and, on a tungsten head, the filament's thermal mass. Unmeasured in this course, and the reason the calibration page exists.
4. 4Light at the paperwhat the print integrates. Measured here with the photodiode head at the easel, not inferred from any of the three above.

Method. Put the photodiode head at the easel, facing the head, at the aperture and height you print at. Wire the probe board to GP15 as the firmware page describes, with one ground wire between the two boards. Then command ten exposures of 1000 ms with the probe watching and the photodiode logging, and put the two records side by side.

Three numbers come out and all three go in the build log. The mean delay from the pin’s rising edge to the light reaching a stated fraction of its steady level; the spread of that delay over ten runs; and the same pair at the falling edge, which is usually different and on a tungsten head is very different indeed.

=What the detector chain can and cannot resolve, stated before you measure

This matters more than the result, because a measurement you cannot resolve looks like a measurement of zero.

The OPT101’s bandwidth is 14 kHz, which corresponds to a response of a few tens of microseconds. The ADS1115 that Part XV reads it with runs at 8 to 860 samples per second, so its fastest sample interval is about 1.2 ms. The Pico’s own converter is quoted at 12 bits and 500 ksps, though what a MicroPython loop achieves through it is a rate this course has not measured.

So the chain as Part XV built it can see a change on the millisecond scale and cannot see one on the microsecond scale. Against an LED head, whose switch is dominated by a 0.56 µs gate constant, the answer this test returns will be zero within the resolution of the instrument — which is a real result and must be written that way, not as “no delay”. Against a tungsten head, whose filament has thermal mass, a millisecond-scale instrument may well be enough, and whether it is is the first thing the calibration page settles.

T2 — The thermal check, at the current you will actually use

Run the array at full current for the longest exposure you ever intend to give, twice over, and measure the case temperature of the transistor inside the load with an infrared thermometer or a thermocouple at the end of it. Record the ambient temperature in the same line, because a case temperature without an ambient is not a number — and record the temperature inside the load’s enclosure too, since on the UVA unit that is a box full of heatsinks and is nowhere near room temperature.

Compare it against stage 0’s prediction. The case is hotter than the arithmetic by whatever the package’s junction-to-case 1.4 °C/W contributes and cooler than the junction by the same, so the two will not agree exactly; what they must do is agree in magnitude. A prediction of 25 °C above ambient and a measurement of 30 °C is the arithmetic working. A prediction of 25 °C and a measurement of 90 °C means one of three things and each has its own test: the array is drawing far more than you think, so meter it at the fuse; the transistor is not fully on, so measure the gate voltage while it conducts; or the part is not the part on the label.

⚗The cheapest reliability there is

A semiconductor’s life falls as its junction temperature rises, and the datasheet’s 175 °C is a limit rather than a target. The design here runs a 47 A part at 2 A, which is four per cent of its continuous rating, and dissipates at most 0.4 W in a package rated for 110 W at a 25 °C case. Nothing about that costs money — the 47 A part and a 5 A part are pennies apart — and everything about it buys margin against the two things you cannot predict: a fault in the load that raises the current, and a darkroom in August.

The general rule the course takes from this: where the cheap part is enormously over-rated, buy the cheap part and use the margin. It is the only place in the whole instrument where reliability is free.

T3 — Off-state leakage, on paper as well as on a meter

Start with the arithmetic, so you know what you are looking for. The IRLZ44N’s drain-to-source leakage current is quoted at a maximum of 25 µA at 55 V with the gate at 0 V, rising to 250 µA at 44 V and a junction temperature of 150 °C. Against an array operating at 2.00 A, 25 µA is 12.5 parts per million — and the real figure at 24 V and room temperature will be smaller still, because leakage falls with drain voltage and with temperature.

The transistor is not the only candidate, and it is not the likeliest. It shares the load’s box with a constant-current driver whose own standby current nobody has published, and possibly with an indicator you fitted. All three are upstream of the same emitter, and the test below cannot tell them apart — which is why the second outcome sends you to a meter before it sends you to a conclusion.

Then test it on paper anyway, and here is why that is not redundant. The arithmetic bounds the current; it says nothing about whether an emitter passing 25 µA emits enough light to expose paper over the length of a printing session. A high-efficiency LED at 25 µA is not off; it is dim. And the UVA case is worse than the visible one, because the paper under a UVA array is a coated sheet designed to respond to exactly that wavelength, and because nobody can see UVA to notice it.

Method. With the master switch on, the supply live, the firmware idle and the output not asserted, leave a sheet of unexposed paper in the position it occupies during a session — under the enlarger, or in the UVA box with the lid shut — for the length of a session you would actually work, an hour or two. Cover half of it with an opaque card. Process it, in total darkness, alongside a control sheet that came from the same packet and never left the box.

Three outcomes, and each is a finding.

• No detectable difference between the two halves, and none against the control. Record the duration, the supply voltage and the array; the channel is dark at those settings, which is a narrower claim than “the channel is dark” and is the one your evidence supports.
• A difference between the covered and uncovered halves. Something is emitting. Meter the leakage at the array with the output unasserted before you conclude it is the transistor: a constant-current driver with its own standby behaviour, and an indicator LED you fitted at stage 5, are both likelier than a MOSFET at a twelfth of its specified leakage.
• No difference between the halves but both are fogged against the control. That is not this channel. It is the room, and it belongs to Part XVI’s fog work.

=The same test, and the reason it is on this page rather than the lesson

The isolation lesson does this arithmetic for a solid-state relay on the mains side and reaches the same shape of answer: Omron quote 1.50 mA of leakage for the G3MB, which develops less than a milliwatt in a hot enlarger filament and does not make it glow — as a calculation from published figures, not as a measurement, and not as a general rule about every product.

This page is where the general rule gets tested on the equipment actually in front of you, because a sheet of paper left under a lamp for two hours is a more sensitive detector than an eye in a dark room and considerably more sensitive than a multimeter. A calculation says what should happen. A processed sheet says what did.

T4 — The interlock beats the timer

This is the test the safety section raises the attention for, and it has one question: does opening the lid darken the array even while the timer is calling for an exposure?

T4a, electrically, with the array disconnected. Multimeter on continuity across the interlock pair. Lid closed reads a short; lift the lid about 2 mm and it must read open. Part XVI established both the switch pair and the 2 mm; this is the same test run again because the array line has been disturbed by this build.

T4b, optically, with a coated sheet and the array live. Put a strip of pre-coated cyanotype paper in the box under the array with a card over half of it. Command a long exposure. Part way through, open the lid — eyewear on, skin covered, standing to one side. Close it, let the exposure finish, and process the strip.

The strip is the evidence and it reads directly: an exposed band that stops where you opened the lid, with the covered half clear, means the interlock removed power while GP15 was still high. Any density accumulating during the open interval means it did not, and that is a fault to be fixed before the unit is used again rather than a result to be recorded and lived with.

Then run T4b again with the exposure commanded from the foot switch, because a pedal held down is the state in which somebody is most likely to open a lid.

⚠What this test does not license

ICNIRP describe a fail-safe interlock as one manufactured, installed, tested and used to agreed relevant technical standards. Two microswitches in series, fitted by a home builder, are not that, and Part XVI already says so plainly. What T4 establishes is that yours works today, on this build, under this firmware. It does not convert it into a certified interlock, it does not license working with the lid open, and it does not replace the rule that the box is closed whenever the array can be energised.

Record the date. An interlock is a mechanism, mechanisms wear, and a test result older than the last time the lid was adjusted is not a test result.

Recording the result

Four lines, on the instrument’s certificate, beside the hardware page’s fog test and bounce figure. The calibration page adds the timing figures to the same sheet, and the calibration record set carries the form.

Record	What goes in it	Why it is on the certificate
The channel	The timer’s series resistor and line pull-down; for each load, its transistor part number, gate pull-down, fuse type and rating; and the connector	A certificate belongs to a configuration, and a substituted transistor in one load is a different instrument for that load only
What it switches	Each load by name, its measured current at the fuse, and its own certificate’s date	The offset in the next page’s certificate belongs to a lamp, not to a timer
Command to light	Mean and spread at the rising and falling edges, per load, with the instrument that measured it and its resolution	A delay quoted without the resolution of the thing that measured it is not a measurement
Leakage, thermal, interlock	The three test results with their dates, and the ambient temperature for the thermal one	All three are properties of a build on a day, and all three drift

Alternative route

Without a UVA unit. T4 does not apply: build the channel, run T1 on the LED head, T2 at its own current and T3 on printing paper. Write not applicable on the certificate rather than leaving the line blank, because a blank reads as an omission and “not applicable, no UVA unit” reads as a fact.

Without a dark room. T1, T2 and T4a are bench work in daylight. T3 is not substitutable, because the quantity it measures is light falling on paper in a room, and the honest entry on the certificate is that the channel’s leakage is untested — which is a different statement from “acceptable”, and the difference is the point. Part XVI’s room page lists the temporary blackouts that turn “no dark room” into “a dark room for two hours”, and two hours is what this test wants.

Without the photodiode head. T1 becomes a comparison rather than a measurement, by the camera method the calibration page sets out: one frame of resolution, 33 ms at thirty frames a second and 8 ms at 120. Write the method and its resolution on the certificate beside the number.

With a legacy mains enlarger, and no wish to convert it. This is the reader the survey cost the most, and the honest position is that there are three routes and no fourth.

Three routes for a tungsten enlarger, and the fourth that does not exist

1. 1Convert the headreplace the lamphouse with the low-voltage LED head of Part XVI. The timer then switches it directly and the mains problem is abolished rather than solved. Costs a build; gains everything else in this part.
2. 2Time it by earleave the enlarger on its own switch and count the exposure on the metronome. Costs resolution and repeatability; costs nothing else, and needs no part of this page.
3. 3Buy the mains halfa certified enlarger timer with its own switched socket owns the mains at £112.20 to £429.00 on 5 September 2026, while the Pure Silver timer keeps the low-voltage heads. Check the plug is BS 1363 and the fuse BS 1362 at the rating the maker states.
4. 4There is no fourth routeno relay board, no smart plug, no home-built appliance, and no procedure for any of them anywhere in this course. If a product appears that passes the five criteria, the question reopens; until then this is the list.

The five criteria, as an acceptance test. If somebody offers you a switching product, this is the checklist; work it in order and let the first failure end it.

#	The criterion	The commonest failure
1	A sealed, finished appliance you never open — moulded plug, socket or IEC outlet, no conductor to terminate	Relay modules and smart-home modules arrive on screw terminals; the case is an accessory
2	A certification mark against a named standard, in literature you can read before buying, plus BS 1363 on the plug and BS 1362 on the fuse	A bare mark in a marketplace listing with no manufacturer behind it
3	Isolation between trigger and mains stated by the maker — a figure or a named clause, never inferred from a photograph	Nothing published at all
4	A current rating that covers an enlarger lamp with margin, stated for a lamp or resistive load	A headline rating that the maker’s own tungsten column halves
5	A trigger that holds the output on while asserted, carrying your interval	A foot-switch input that starts the host’s own programme

Criterion 5 is the one that decided it, and it is worth having the sentence to hand: RH Designs write that their foot switch exactly replicates the operation of the Start/Stop key. A switch you cannot tell how long to stay closed is not a switch this timer can use.

Troubleshooting

Symptom	Likely cause	Test that separates it
The lamp never comes on	Gate not driven, pull-down shorting the gate, the fuse open, or the connector half-mated	Meter the gate voltage while the firmware asserts the output: 3.3 V and no light is a load fault, 0 V is a drive fault
The lamp comes on at boot, before anything is commanded	The gate pull-down is missing, open, or fitted to the wrong node	Meter gate to source with the cable unplugged at the load: it must read 100 kΩ, not open. With the cable connected and the timer unpowered it reads about 50 kΩ, because both pull-downs are then in parallel
The lamp comes on when the cable is unplugged, or flickers when it is moved	A broken conductor in the gate line with no pull-down at the gate — the failure mode the far-end resistor exists for	Unplug at the load and meter gate to source. Open circuit means the pull-down is missing or on the wrong side of the connector
The lamp comes on and will not go off	The MOSFET has failed short, which is how they usually fail	Master switch off, then meter drain to source with the gate grounded. A few ohms is a dead part; replace it and find out what killed it before you power up
The transistor runs far hotter than stage 0 predicted	Array current higher than assumed, gate not fully on, or a mis-marked part	Meter the current at the fuse and the gate voltage while conducting; two measurements settle all three
The fuse opens on switch-on but not later	Inrush into the driver’s input capacitance, or a genuine fault	Meter the steady current first. A fuse that opens on a load whose steady current is well inside its rating is telling you about the switch-on transient, which is a slow-blow question, not a rating question
A faint glow between exposures	Leakage somewhere in the chain — driver standby, an indicator, or the transistor	T3, with the meter first and the paper second. The paper is the arbiter
The array stays lit with the lid open	The interlock is bypassed, welded, or wired into a signal rather than the array line	T4a, immediately, and the unit is out of service until it passes
Intermittent exposures that the log says were commanded correctly	A stranded conductor spreading under a screw terminal	Ferrules. Then re-run the soak test from the firmware page
The output connector will mate with the foot-switch socket	The wrong connector family was fitted	Change it now. It is five minutes today and a ruined sheet plus an hour of confusion later

Questions

1. Your array draws 3.2 A. Compute the transistor’s dissipation and junction rise at each of the three on-resistance figures in stage 0, and say whether the conclusion changes. Then state the current at which you would stop using a part whose datasheet is silent at 3.3 V, and justify the threshold you chose.
2. A friend fits the fuse in the negative return, at the load end, rated at the supply’s 5 A. Give three separate things wrong with that and rank them by how much harm each could do.
3. The datasheet gives the MOSFET’s turn-on delay as 11 ns and its rise time as 84 ns, both at a 3.4 Ω gate resistor. Your circuit uses 330 Ω. Explain why the datasheet’s figures are not the ones that govern your build, compute the figure that does, and say why neither number matters for a print.
4. Your leakage test shows no difference between the covered and uncovered halves, but both are slightly darker than the control. Say what you have and have not learned, and give the next test.
5. Explain why the UVA interlock sits in the array’s supply line rather than as an input the firmware reads, and describe a plausible firmware bug that the first arrangement survives and the second does not.
6. You are offered a sealed plug-in mains switch with a screw-terminal 12 V trigger input, CE marked, no standard named, £34. Work the five criteria in order and say at which one you stop and why.
7. The page argues that a 47 A transistor switching 2 A is good engineering rather than waste. Make the opposing case, then say what would have to be true for it to win.

Further experiments

Measure the leakage properly, with a decade of sensitivity you do not have. Put the photodiode head in the closed UVA box, output unasserted, and integrate for ten minutes at the highest gain the converter offers. The dark reading of the detector is your floor; anything above it is emission you can now put a number on rather than a yes or a no. Compare that number with the paper’s answer from T3, and you have calibrated a two-hour test against a ten-minute one.

Find the gate voltage at which your particular transistor stops being on. Drive the gate from a bench supply through the 330 Ω resistor, run the array at its working current, and walk the gate down from 5 V in 0.1 V steps while watching the drain-to-source voltage. The knee is the number the datasheet declined to print, for your part, at your current — and it will tell you how much margin the Pico’s 3.3 V actually has.

Time the whole chain against something outside it. Film the lamp and a stopwatch display in one frame at your camera’s highest frame rate, and compare the frame count against the probe’s microseconds. The two agreeing matters more than either being precise, because their failure modes are unrelated.

Check your understanding

Question 1. The IRLZ44N datasheet quotes an on-resistance at 10 V, 5.0 V and 4.0 V of gate drive, and nothing at the 3.3 V a Pico supplies. Your array draws 2.0 A. What is the correct response?

• Use the 4.0 V figure, since it is the closest quoted value and therefore the best estimate
• Compute the dissipation at the worst quoted figure and again at a deliberately pessimistic stand-in, show that both are far below the junction limit, and record in the build log that the figure was bracketed rather than read
• Reject the part, because a datasheet that does not specify your operating point cannot be used
• Measure the on-resistance yourself and treat your measurement as the datasheet value

Show the answer and why

Answer: Compute the dissipation at the worst quoted figure and again at a deliberately pessimistic stand-in, show that both are far below the junction limit, and record in the build log that the figure was bracketed rather than read

The rule from Part XIV is that a part is only specified where its datasheet says it is specified, and everything else is a risk you take knowingly. Taking the 4.0 V figure as an estimate is the tempting error: the trend is the wrong way, so the true 3.3 V value is higher rather than closer. What makes the design sound is not a better number but a margin large enough that the number cannot reach the conclusion — 0.1 W against 0.4 W, both against a 110 W package. Rejecting the part would be right at 10 A and is over-cautious at 2 A. And measuring your own sample tells you about that sample, which is useful as a further experiment and is not a specification.

Question 2. Why does this page put the fuse at the supply end of the positive rail rather than beside the load?

• Because a fuse works better at higher voltage
• Because a fuse protects the conductor downstream of itself, so one fitted at the load end leaves the whole run between supply and load unprotected
• Because the transistor would otherwise be destroyed before the fuse opened
• Because it is easier to reach for replacement

Show the answer and why

Answer: Because a fuse protects the conductor downstream of itself, so one fitted at the load end leaves the whole run between supply and load unprotected

The purpose of a fuse is to open before the cable overheats — which is why Electrical Safety First describe a blown fuse on the mains side as the thing that stops the cable and the appliance overheating, and why the rating comes from the appliance rather than the socket. Everything upstream of a fuse is unprotected by it, so a fuse at the load end guards the last half-metre and nothing else. The transistor is genuinely destroyed before any fuse opens, but that is a reason the fuse is not for the transistor, not a reason to move it. Accessibility is real and is a tie-breaker between two electrically equivalent positions, which these are not.

Question 3. The transistor datasheet bounds off-state leakage at 25 µA. Why does the page still leave paper under the lamp for two hours?

• Because datasheets are frequently wrong and the figure should be independently confirmed
• Because the arithmetic bounds the current and says nothing about whether an emitter passing that current exposes paper over a session — and a coated sheet is a far more sensitive detector of accumulated light than a meter or an eye
• Because the leakage rises over two hours as the transistor warms
• Because the test also checks the interlock

Show the answer and why

Answer: Because the arithmetic bounds the current and says nothing about whether an emitter passing that current exposes paper over a session — and a coated sheet is a far more sensitive detector of accumulated light than a meter or an eye

The two tests answer different questions. The datasheet answers "how much current can flow", and 25 µA against a 2 A operating current is twelve parts per million — reassuring about the transistor. It does not answer "does the paper notice", which depends on the emitter's efficiency at microamps, the geometry, the paper's sensitivity and the duration, none of which is in the datasheet. Kodak's point that virtually all exposures are cumulative is what makes duration the decisive variable, and it is why the detector has to be the paper. Leakage does rise with junction temperature — the datasheet gives 250 µA at 150 °C — but an unasserted transistor is not dissipating and does not warm.

Question 4. The lid interlock is wired in series with the UVA array's own supply line rather than into a Pico input. What does that arrangement survive that the other one does not?

• A power cut
• Any failure of the firmware or of the Pico itself — a hang inside the exposure loop, a crashed board with the pin latched high, or a bug in the state machine — because a switch in the current path removes the current without asking anything
• A blown fuse
• A failure of the interlock switches themselves

Show the answer and why

Answer: Any failure of the firmware or of the Pico itself — a hang inside the exposure loop, a crashed board with the pin latched high, or a bug in the state machine — because a switch in the current path removes the current without asking anything

A software interlock is a request that something running must honour; a switch in the current path is an answer that needs nothing to be running. The failure the design guards against is precisely the one where the thing that would have honoured the request is the thing that failed. Note what it does not cover: a welded microswitch is a failure of the interlock itself and is exactly why Part XVI fits two, operated by different parts of the lid, and why T4a is a continuity test before it is anything else. And note the honesty required — two home-fitted microswitches are not the fail-safe interlock ICNIRP describe, and this course says so.

Question 5. A supplier offers a sealed, plug-in mains switch with a documented 12 V trigger input on screw terminals, CE marked, no standard named, at £34. Working the five criteria in order, where does it fail?

• Criterion 4, because 12 V is not enough to drive it from a Pico
• Criterion 1, because live and neutral arriving on screw terminals means fitting it is mains installation work — and criterion 2 follows immediately, because a mark without a named standard in readable literature is not evidence for a safety claim
• Criterion 5, because a trigger input cannot carry an interval
• Nowhere; at £34 it passes the price test and should be recommended

Show the answer and why

Answer: Criterion 1, because live and neutral arriving on screw terminals means fitting it is mains installation work — and criterion 2 follows immediately, because a mark without a named standard in readable literature is not evidence for a safety claim

The criteria are worked in order and the first failure ends the assessment, which is what makes it a test rather than a shopping trip. Screw terminals for live and neutral fail criterion 1 outright: the reader would be terminating mains conductors, which is the Level C work this course does not teach. Criterion 2 fails immediately afterwards, because a mark with no named standard in literature a buyer can read before purchase is discovery rather than evidence. Criterion 5 is the one this particular device might actually pass, which is exactly the pattern the survey found: the devices that take a trigger are not sealed appliances. And the price test is the last question, not the first — a cheap device that fails criterion 1 is cheap for a reason.

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